Moore Scaling, Von Neumann Problems

The slowing of Moore’s Law, the persistence of von Neumann bottlenecks, and the massive data demands of emerging applications such as AI call for new architectures that address both performance and sustainability. My research explores processing-in-memory (PIM) as a solution space to reduce data movement costs and improve efficiency, either replacing or supplementing accelerators. Using commodity DRAM as an exemplar, we developed a technology-agnostic PIM approach for multiplication and addition that achieves up to 10× speedup and 8× higher energy efficiency over prior in-DRAM proposals. With more advanced memories such as spintronic racetrack memory, we leverage transverse access to construct polymorphic multi-input gates for multi-operand logic, delivering up to 6.9× performance and 5.5× energy gains. Extending this to floating-point operations enables deep-learning acceleration at the edge, supporting both inference and training with ≥2× efficiency compared to FPGA accelerators. We further show that PIM-based solutions can outperform GPUs in reducing greenhouse gas emissions, underscoring new tradeoffs in sustainable edge AI system design. This work also reflects the broader opportunities at Syracuse University, where the EECS department is building on strengths in AI, wireless communications, and quantum systems to tackle critical technological challenges.
Tainan City, T'ai-wan, Taiwan, 70101